This SDR could be used as general purpose SDR as well, but I am designing as ARDF 80m direction finding receiver. Concept for SDR Base:

• 2 Channel ADC, 16bit, 20+MSPS
• Zynq 7010-CLG225 with SPI Boot Flash

Thats basically it - well it has also be lowest power, so I am making all the digital part and ADC to work from 1.8V, there will be no I/O at higher voltage, also there is no external DDR memory, for the standalone SDR application it is not needed.

I think I have all homework done, 7010 FPGA fabric should be large enough, as of power I think it will be in acceptable range - for the ARDF competion it is sufficient if the battery pack gives 3 hours of work time.

For ADC I have selected LTC2270, this seems to be best available ADC for my goals, 20MSPS, 16 bit with very low noise. And well there are compatible versions with higher sample rate also.

After 2 hours the Heart of the ARDF SDR is designed and routed in PCB also, LTC2270 is next to 7010 all ADC signals are routed in top layer only, and the PCB can be made still with 6 layers only. This is good progress!

To complete the design, some design decisions are still to be made, the complicated ones: the connectors! And another decision: one connector or 2 connectors? The ADC inputs are nicely at one edge of the PCB, so logical choice would be to have all analog signals there in "analog" connector, and the digital part in another one, to separate the digital and analog domains.

Top would be "analog signal" entry and bottom digital connector? Or maybe one long connector at the left with part of the connector being analog and part digital?