-- Quartus Prime compile process and SignalTap logic analyser.
(with thanks to Peter Cheung at Imperial College London for an image)
http://people.ece.cornell.edu/land/courses/ece5760/Quartus/Quartus_compile.html

-- TimeQuest and SDC files
http://people.ece.cornell.edu/land/courses/ece5760/Quartus/TimeQuest_sdc_file.html

-- ModelSim Example
http://people.ece.cornell.edu/land/courses/ece5760/ModelSim/index.html

-- Power Estimation in Quartus
http://people.ece.cornell.edu/land/courses/ece5760/DE1_SOC/HPS_peripherials/Power_est_index.html