SHAOSI just finished creation of the table:
https://gitlab.com/nedopc/sdk/-/blob/master/rasm/voja4.tab
It was partially generated by C-program:
https://gitlab.com/nedopc/sdk/-/blob/master/utils/voja4gen.c
Also rasm.c was extended to support new rules (now it's v2.6):
https://gitlab.com/nedopc/sdk/-/blob/master/rasm/rasm.c
In order to run it on your machine you need to do:
> git clone https://gitlab.com/nedopc/sdk.git
Cloning into 'sdk'...
remote: Enumerating objects: 1216, done.
remote: Counting objects: 100% (1216/1216), done.
remote: Compressing objects: 100% (506/506), done.
remote: Total 1216 (delta 732), reused 1130 (delta 688), pack-reused 0
Receiving objects: 100% (1216/1216), 491.77 KiB | 0 bytes/s, done.
Resolving deltas: 100% (732/732), done.
Checking connectivity... done.
> cd sdk
> cd rasm
> make
gcc -O2 -I../common -c rasm.c
gcc -O2 -I../common -c ../common/my_text.c
gcc rasm.o my_text.o -o rasm
After that you will be able to assemble Voja4 programs using ./rasm FILENAME.A -tvoja4.tab
(or you can copy voja4.tab to default.tab and then you can do just ./rasm FILENAME.A).
A little bit about RASM - it's slightly unusual assembler - for example for comments it may use \ or //
All numbers are decimals. For hexadecimals you need to use # (like #100 is 256).
Your program can have ORG as 1st directive (without ORG assembling will be done from address 0).
Macros defined by EQU must start with @ to differentiate them from labels. Includes are started with +
Other supported directives are DB, DW (sequence of bytes and sequence of words respectively) and DUP - unfortunatelly for this particular CPU they are unusable, because data memory is not available for assembler here and all data locations must be defined through EQUs (I'll prepare include file soon).
Discussions
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@SHAOS I dl'd rasm and created a small test with 2 lines. I'm trying to download, but it's not working. Perhaps because I'm not doing the load correctly but I noticed the result was a .BIN file of 4 bytes. Doesn't it need a header as well?
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you're right - no header in the BIN
idea was to create a separate utility that will add header or special program to flash the BIN with adding header on the fly
I didn't do that yet because was too focused on emulator where naked BIN was much more appropriate form of representation of the code....
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Gotcha. I got the python tools to work, so I suppose that is working for me. Thanks.
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Are integer literal operands supposed to be space separated? I tried "MOV_R0,1" and it doesn't find it, but "MOV_R0, 1" appears to work.
Also, looking at the Rev3 ISA I see "ADD R0,N", but in voja4.tab I think there might be a typo with "ADD_R1, #00 #10+".
Thanks for the tool!
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yes, it’s RASM “feature” when instruction prefix must end with white-space before any argument - I plan to fix it sometime later (and get rid of _ in source file too)
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