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Hardware design

A project log for DRM-114

DEFCON 27 SAO project

nick-sayerNick Sayer 08/15/2018 at 00:390 Comments

The hardware design is very, very straightforward.

The SAO++ connector is assumed to provide good 3.3v power and LVTTL serial I/O. There's a 10 µF filter/bypass cap on the input. That serial I/O will be connected to the port C serial port. That port will be configured to run at either 9600 or 115200 baud (TBD). The 100 Ω resistors are there to cut down a little bit on EMI and static sensitivity.

The serial port on port D is the infrared I/O port. The transmit data will directly switch the IR LED on and off (a MOSFET is used for more current capacity). The controller's IRCOM module will be configured to modulate the serial data at 36 kHz to match the receiver.

The receiver outputs demodulated data, so the receive pin in the controller will be configured for direct decoded input at the same baud rate.

There is a 16 MHz crystal for use as a clock source. Internally a PLL will double this to 32 MHz. The crystal insures the divided clock for the serial I/O is more stable than the internal RC oscillator and FLL would be.

And that's it. The vast majority of this project is in the firmware.

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