Psion were a clever bunch, but like many companies in the early 90s they didn’t really do standards. Although the 3c and 3mx had a proper RS-232 serial port (albeit using a very odd connector), all of the earlier models used a proprietary protocol called the SIBO Serial Protocol. All Series 3 models used SSDs that also communicated using this proprietary protocol.

A significant part of developing this equipment involves working out how to emulate an SSD or Psion peripheral. Luckily, while trawling the Internet for Psion PDFs I found the Psion SIBO Hardware Development Kit. This book gives a breakdown of how to create equipment for the Psion Series 3 and 3a, including the controller chips needed, the Psion serial protocol, and how to write drivers for the Series 3 and 3a.

The controller chips are known as ASICs, or Application Specific Integrated Circuit chips. As far as I can tell, Psion SSDs mainly use the ASIC4, which converts the SIBO Serial Protocol into addresses within the memory range of the SSD’s on-board memory.

The original ASIC4 has two modes. The first is SSD Mode. This makes the ASIC4 compatible with its predecessor the ASIC5. In this storage-only mode, the ASIC4 can use 21 address bits for memory. As far as I know, this is the way the ASIC4 is configured in every SSD.

The second mode that the ASIC4 can use is called the Extended Mode. This increases the addressable range of memory from 21 bits to 28 bits. Also, the ASIC4 Extended Mode also has a sub-mode called Mixed Mode, which tells the Psion that it's talking to a device that consists of both storage and peripherals. Mixed Mode causes the addressable memory to be split exactly in half, with the lower half used for memory-mapped peripherals and the upper for storage. According to the HDK, this storage is typically used as a ROM including software and drivers to control the peripheral. However, it seems that it can also be used as RAM storage or Flash storage.

As you probably already know, the two aims of this project are to give the Psion both better storage and Wi-Fi access. I'm going to ignore the Wi-Fi challenge for the moment and focus on emulating an SSD, specifically an ASIC4 in Extended Mode. Being able to do that will be an achievement in itself, because it means my 3c will have some modern non-volatile storage.

My first challenge is to deal with the SIBO Serial Protocol. To briefly summarise, this uses a 5v half-duplex two-wire system - CLK and DATA. The 3c controls the clock and sends out 12-bit packets (0-11). Bit 0 and Bit 11 are start and end bits. Sometimes Bits 1 and 2 tell the slave device that it's the slave's turn to send data back on Bits 3-10. 

Oh, and the 3c's CLK runs at a nominal 3.84 MHz. Not fast, but not slow either.

What I really want to do is emulate an ASIC4. As far as I see it, I don't need to totally recreate the ASIC4. All I want to do is make my 3c think that it’s talking to an ASIC4 in Extended Mode.

I can see three ways of tackling this:

1. Completely emulate the ASIC4 on Espruino. This is what I really want to do. But would the Espruino platform be fast enough to cope with the 3.84 MHz clock? I'm guessing pure JavaScript would be nowhere near fast enough to handle it, so a driver would need to be written in C.
2. Use an original ASIC4 chip. They're not too difficult to get hold of (SSDs pop up all the time on eBay), but there is a finite supply. Also, I would need to remove the chip from an SSD, and I'm not quite at that level of soldering skill yet. Finally, I would need to work out how to get Espruino to talk to an ASIC4.
3. Emulate the ASIC4 in FPGA. This scares me the most. I haven't got a clue about FPGAs. However, I know it would be insanely fast and mean that I wouldn't have to break SSDs. Still, I'd need to work out how to get Espruino to talk to the FPGA.

If I do try to emulate an ASIC4, I don’t have to emulate the entire chip and all its pins. I just need to make the Psion think it’s talking to an ASIC4. What I don’t know, though, is if an ASIC4 can be connected to an SSD port in Mixed Mode and have the Psion recognise it. Or, to be more accurate, if I can make something that pretends to be an ASIC4 in Mixed Mode and have the Psion recognise it.

Once I have this first major stage working, I will look at emulating Extended Mixed Mode so that I can send commands to the Espruino to control the Wi-Fi.