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RISCV Simulator mostly working

A project log for RISCV SoftCPU for 2018 Contest

RISC-V SoftCPU for the offical contest 2018

antti-lukatsAntti Lukats 10/15/2018 at 15:520 Comments

There are simulators available but the best way to have all tuned up and tested for the SoftCPU is to write own simulator first.

This is pretty simple task, spent maybe 11 hours to get the simulator to pass all RV32I compliance test cases all test except those that use CSRs or traps are working. Verification with the original compliance test suite signatures.

Next step with simulator is to pump it up to run, hello, then dhrystone and then boot zephyr (a requirement by the contest rules)

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