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A project log for nedoPC-5

DIY personal computer built around 32-bit version of RISC-V processor

shaosSHAOS 11/20/2018 at 02:290 Comments

RV32I[MA] emulator with ELF support (RV32M and RV32A are optional)

https://gitlab.com/nedopc/npc5/blob/master/emu-rv32i.c

gcc -O3 -Wall -lelf emu-rv32i.c -o emu-rv32i

Passed RV32I compliance tests from https://github.com/riscv/riscv-compliance

make RISCV_TARGET=spike RISCV_DEVICE=rv32i TARGET_SIM=/full/path/emulator variant

Running simple code:

riscv32-unknown-elf-gcc -O3 -nostdlib test1.c -o test1
or
riscv64-unknown-elf-gcc -march=rv32i -mabi=ilp32 -O3 -nostdlib test1.c -o test1
then
./emu-rv32i test1
Hello RISC-V!


How to build RISC-V toolchain

https://riscv.org/software-tools/risc-v-gnu-compiler-toolchain/

Latest one is GCC 8.2.0

64-bit universal version (riscv64-unknown-elf-* unsuitable for Zephyr):

./configure --prefix=/opt/riscv

make

32-bit version (riscv32-unknown-elf-* suitable for Zephyr):

./configure --prefix=/opt/riscv32  --with-arch=rv32gc --with-abi=ilp32

make


RTOS Zephyr v1.13.0

https://github.com/zephyrproject-rtos/zephyr/releases/tag/zephyr-v1.13.0

It requires newer versions of CMake and DTC than my Debian had and also you need to do couple modifications for GCC 8.2.0:

1) lib/libc/minimal/include/sys/types.h: 

change
#elif defined(__riscv__)
to
#elif defined(__riscv)

 2) add to the end of zephyr-env.sh:

export ZEPHYR_TOOLCHAIN_VARIANT=cross-compile
export CROSS_COMPILE=/opt/riscv32/bin/riscv32-unknown-elf-

Zephyr example:

cd zephyr
source zephyr-env.sh
cd samples/synchronization
mkdir build && cd build
cmake -GNinja -DBOARD=qemu_riscv32 ..
ninja
emu-rv32i zephyr/zephyr.elf

Thanks to @Frank Buss for source code of emulator and howtos!

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