Today, I've added a few more instructions, and tested them in a simple program. The new instruction set looks like this:

0x00 - NOP
0x01 - LD A (immediate)
0x02 - LD B (immediate)
0x03 - LD C (immediate)
0x04 - LD D (immediate)
0x05 - LD E (immediate)
0x06 - JMP (immediate)
0x07 - NOP
0x08 - ADD B
0x08 - NOP
...
0xFE - NOP
0xFF - HALT

In order to test the functionality of each instruction and the hardware, I created a simple looping program to repeatedly increment the A register.

LD A, 0    ;resets the A register
LD B, 1    ;Loads 1 into B for incrementing (no inc instruction yet)
Loop:
ADD B      ;adds A and B, then loads the result into A
JMP Loop ;Loops to increment A

 I did end up coming across a few bugs in the hardware and my instruction decoding, so I'm glad I tested before the CPU became more complicated/difficult to debug.

I'll continue adding more instructions for now, and I'll give another update at some point tomorrow.