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A project log for SIFP - Single Instruction Format Processor

A super-scalar, reduced instruction set processor where microcode and machine code are the same thing!

zpekiczpekic 12/19/2023 at 05:280 Comments

Tooling is one of the most important things in software engineering. Better tooling means better quality and productivity, and often security, documentation, list goes on.

The description below applies to this project but also other similar ones.

Build time

Two main tools are used:


Microcode compiler consumes .mcc or .sif text source files and can generate various output formats, for example Intel .hex or .vhd. Either of these can be used to prime the "ROM" memory of the system.

ISE14.7 - in addition to project files, also includes either .vhd produced by mcc or during build time loads the .hex file using a helper function. 

The output is a .bin file which gets downloaded to the target device (FPGA board) using a utility tool.

Run time

Currently, system build around SIFC processor implements:

  1. VGA (32*64 character only) as primary output device
  2. UART (bi-directional, connected to USB2UART device appears as COM: port) as "console" device (text-only input and output)
  3. UART (one-directional, connected to USB2UART device appears as another COM: port) trace output device

There are two devices inside the target system that help with debugging:

debugtracer mods \ CPU modeTRACEONTRACEOFF
EnabledAllows tracing all bus cycles (except INTA)Allows tracing instruction fetch and memory read/write only
DisabledSlow system speed (8 clock cycles per instruction)Full system speed (2 clock cycles per instruction)

On the host PC, COM port #2 must be connected to some terminal emulator type of application to allow command interaction with the system.

However, for COM port #3, there are 3 options:

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