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Added an internal (FPGA) RF Generator

A project log for 32MHz spectrum + SDR + FT8 in an FPGA

A 0 - 32MHz FPGA based Software Defined Radio (AM SSB FT8) by ready modules->cheap and easy Last add: Oct 6th FT8 VHDL GFSK modulator

guidoGuido 11/07/2022 at 22:070 Comments

Just to go step by step, before connecting the external ADC, I added an internal RF generator (1 - 30 MHz).

The DDS compiler block with name "RF_test_1MHz" can generate a sinusoid encoded on 12 bits (two's complement).

Using an AXIS MUX "axis_mux_0" you can select (see the line select_input) the real ADC_in or the RF test generator.

Please note that the result is encoded on 32 bits:

In this way I'm ready to handle the IQ samples (16 + 16 bits).

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