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A project log for Jelly

A minimal DIY 8-bit CPU made with TTL chips, to perform native brainfu*k language, extended to use three sequential access tapes.

alvaro-barcellosAlvaro Barcellos 09/06/2022 at 21:010 Comments

Good news.

Going through lists of TTLs and cpus and diy homebrew projects, I have a good feeling that I'm not doing anything very different than what has already been done for different purposes.

Using eeproms to save logic by defining FSM to control the signals, aka microcode, is common practice. Use 3-state latchs to isolate shared data bus, ditto. Use counters to synchronize pipeline phases, ditto. Use eeprom to define the results of mathematical operations, ditto.

I still need to figure out how to process flags, state toggles and other synchronisms.

All the TTL chip circuits have arrived, so I can start building and testing.

First, I need to build an eeproms programmer, see eepromgrammer.

some links for same uses.

http://www.bigmessowires.com/nibbler/

https://github.com/Turing6502/TuringSAP1

https://tomnisbet.github.io/nqsap/

The Mark One computer also have a opcode set very like Jelly one's.

http://www.aholme.co.uk/Mk1/Architecture.htm

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