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A project log for Jelly

A minimal DIY 8-bit CPU made with TTL chips, to perform native brainfu*k language, extended to use three sequential access tapes.

alvaro-barcellosAlvaro Barcellos 02/02/2023 at 13:050 Comments

This project is still waiting pieces to born in hardware.

While I'm learning about 6502 circuits and Forths, searching options to emulate the 3 tapes for Jelly.

Use of common SRAM and FLASH memories is in the stream, but Jelly have no concept of address, just increase or decrease a stream.

Could be a pack of counters as 74hc193, using 4 to 16 address bits of memory, limits to 64 kb both memories, and minimal logic for decode up or down.

And leds, many leds...

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