This week got crazy busy, still working on the sound card and I've mostly finished the simulations.  some of them have a HC line to halt the main DAC clock. this was omitted in the final design for simplicity sake.  take a look they are all built using "Digital" and uploaded into the files section.

"Digital" is a Logisim digital logic simulator by H. Neemann - though it is relatively hard to google the git hub due to the name. Fortunately, a conveniently provided link is above.