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• Understanding and Experimenting with MDI Circuits

  Alan • 12/08/2022 at 01:15 • 0 comments

  I know there are many ways to design an MDI circuit.

  There's been a lot of discussion and answers about circuits, but I haven't been able to find a really clear and unambiguous answer.

  So I decided to run the test.

  I tested it with the previously designed W5100S-EVB-TEST board.

  Wiznet W5100S-EVB-TEST board production record

  The above link is the development process of the "W5100S-EVB-TEST" board.

  W5100S-EVB-TEST-V1.0 Board Circuit Cross Section

  W5100S-EVB-TEST Circuit Schematic

  Let's look at it with an uncomplicated block diagram.

  The PHY chip is divided into two modes: current mode and voltage mode.

  • Current mode has no DC bias voltage inside, so it must be caught externally.
  • Since Voltage Mode has a DC bias voltage inside, there is no need to hold the bias voltage from the outside. (Voltage Mode and Current Mode each have their pros and cons, but Voltage Mode is overwhelmingly superior in terms of power)

  I saw an article explaining Current Mode as Open Collector and Voltage Mode as Push-Pull, but it seems different for each PHY.

  Since W5100S PHY is in Current Mode, it is necessary to hold the bias voltage from the outside. On this board, all center taps are connected to 3.3V. The voltage applied to the center tap becomes the bias voltage, and it comes out as a complementary waveform around that voltage.

                          Figure 1 <100 Ohm Termination of Differential-Mode Signals>

  [Figure 1]

  Here, the 49.9 ohm resistor of the differential pair line that looks like a pull-down is a parallel termination resistor. Since each differential line is very high frequency, + and - change very quickly based on the center tap power. Due to this, the current is not circulated well, so it is reflected and ringing can occur. To prevent this, the current can be circulated by attaching a terminating resistor to the end of the signal, that is, near the receiver.

  Since the differential mode impedance of the UTP cable is 100 ohms according to IEEE802.3, this terminating resistance is also set to 50+50=100 ohms. And by installing a 100nF Capacitor in the middle, the surge can also be removed by GND. (RC Filter role)

                                                  Figure 2 <common mode noise>

  [Figure 2]

  And 75 ohms behind the transformer is a resistor for common mode noise termination. As shown in Figure 2, since CHGND is connected to the outside, a loop is formed, which can cause noise induced in the cable as Tx and Rx signals to enter. This is called common mode noise.

                               Figure 3 <75 ohm termination of common mode noise>

  [Figure 3]

  To remove this common mode noise, we attach a 75 ohm termination resistor, and this circuit is called a Bob-Smith circuit. Common mode noise coming in through the case is terminated through the center tap of the transformer.

  (IEEE802.3 formally states that the common-mode impedance is 75 ohms for termination)

  **There is still a lot of discussion about this circuit. (Example of interesting discussion)

  Why is Bob Smith termination for Ethernet recommended if it's wrong?

                                  Figure 4 <Wiznet W5500 Reference Schematic>

  [Figure 4]

  If you look at 4, 5, 7, 8 in the figure above, you can see that there is a pair of 50 ohms in parallel, followed by one 50 ohm in series.

  50|50+50 = 75 ohms for common mode termination and 100 ohm differential mode termination are designed.

  Test progress

  Now that the description of the circuit is over, the full-scale test proceeds.

                               ...

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