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3niti alpha

Ternary computer "3niti alpha" that I started to design in 2004

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Ternary is still in kind of "Science Fiction" state, but I'm working on getting it into "Real Science". I started to be interested in ternary (more precisely "balanced ternary" with 3 states -1,0,+1) in December 2004 and immediately designed a simple ternary 3-trit computer architecture that I called "3niti alpha" (so in the future it's gonna be "beta", "gamma", etc :) and in October 2008 I also designed control panel for it (see below). Later I did software emulation in Java (now obsolete) and then hardware emulation with help of 8-bit PIC microcontroller. It is too far from actual "true ternary" implementation yet, but I'm slowly moving to that direction and I'll be there eventually ;)

A little of ternary theory - we will use "balanced" one where our 3 values are -1, 0 and +1 (NOT 0,1,2). Atomic bit of ternary information usually called trit. And lets call 3 trits a triad. 1 trit could be in 3 states, 2 trits could be in 9 states (3^2) and 3 trits could be in 27 states (3^3). Triad may represent a number from -13 (9*(-1)+3*(-1)+1*(-1)) to +13 (9*(+1)+3*(+1)+1*(+1)), but how we should write this numbers in ternary form? -1-1-1 and +1+1+1 are not practical. So we came up with alphabetical labels for ternary values: +1 is labeled P (positive), 0 is labeled O (it's letter O, but we call it "neutral") and -1 is labeled N (negative), So -1-1-1 (number -13) could be written as NNN and +1+1+1 (number +14) could be written as PPP. Obviously 000 (number 0) is OOO :)


Now about 3niti alpha architecture (mostly designed in 2004). It has 3-trit data (27 possible values from -13 to +13), 9-trit address (to access up to 19683 cells) and 9 registers (coded by 2 trits that could be represented by numbers from -4 to +4):

N (-4): triad from memory addressed by DPn;
O (-3): triad from memory addressed by DPo;
P (-2): triad from memory addressed by DPp;
F (-1): flag register: RSF (Result Sign Flag), DPF (Data Pointer Flag), BCF (Borrow Carry Flag);
A (0): accumulator register;
B (+1): auxiliary register;
L (+2): lower triad of current DP register;
M (+3): middle triad of current DP register;
H (+4): higher triad of current DP register.


There are THREE 9-trit DP (data pointer) registers - DPn, DPo, DPp that are available through registers L/M/H when flag DPF has corresponding value (N, O, P respectively). Also there is 9-trit register PC (program counter) and this architecture doesn't have a stack, so no register SP.

Instruction set is 27 opcodes ($ means one triad in instruction parameters):

TernaryDecimalMnemonicDescription
NNN-13SANSave value from register A to N (memory cell with address DPn)
NNO-12SAOSave value from register A to O (memory cell with address DPo)
NNP-11SAPSave value from register A to P (memory cell with address DPp)
NON-10SAFSave value from register A to F
NOO-9SPCDSave value from PC (program counter) to current DP (data pointer)
NOP-8SABSave value from register A to B
NPN-7SALSave value from register A to L (lower triad of current data pointer)
NPO-6SAMSave value from register A to M (middle triad of current data pointer)
NPP-5SAHSave value from register A to H (higher triad of current data pointer)
ONN-4RLARotate register A to the left through flag BCF
ONO-3ADDAdd register A with B and flag BCF, save result to A and BCF, modify sign flag RSF
ONP-2RRARotate register A to the right through flag BCF
OON-1LAI $Load register A from immediate triad
OOO0ADI $Add register A with immediate triad and flag BCF, save result to A and BCF, modify sign flag RSF
OOP1OPA $Perform unary "tritwise" operation over A (function is defined by immediate triad), modify sign flag RSF
OPN2LDI $ $ $Load current DP (data pointer) by immediate 3 triads (higher triad, middle triad, lower triad)
OPO3JMP $ $ $Jump to address (copy to PC) set by immediate 3 triads (higher triad, middle triad, lower triad)
OPP4OPB $ $ $Perform binary "tritwise" operation over A and B, save result to A (function is defined by immediate 3 triads), modify sign flag RSF
PNN5LANLoad register A by value from N (memory cell with address DPn)
PNO6LAOLoad register A by value from O (memory cell with address DPo)
PNP7LAPLoad register A by value from P (memory cell with address DPp)
PON8LAFLoad register A by value from F
POO9LPCDLoad PC (program counter) by value from current DP (data pointer)
POP10LABLoad register A by value from B
PPN11LALLoad register A by value from L (lower triad of current data pointer)
PPO12LAMLoad register A by value from M (middle triad of current data pointer)
PPP13LAHLoad register A by value from H (higher triad of current data pointer)

Control panel for 3niti alpha (designed in 2008) consists of 2 rows:

Top horizontal row of 15 "ternary" red-green light indicators:

  • Lights...
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pdbl1hex.c

PDBL1HEX v1.2 - C source code of program for Linux, MacOS X and Windows XP that flash HEX-file to PIC16F870 through PDBLv1 serial interface

x-csrc - 10.17 kB - 05/18/2018 at 00:48

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PDBLv1-2A2.inc

Program interface to PDBLv1 (built 2A2) for user programs (see 3nitiAS1_test3.asm for example)

inc - 4.53 kB - 05/18/2018 at 00:44

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PDBLv1.hex

Public Domain Boot Loader v1 for PIC16F870 - prebuilt HEX file (built 2A2)

x-hex - 7.60 kB - 05/18/2018 at 00:44

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PDBLv1.c

Public Domain Boot Loader v1 for PIC16F870 - source code in C

x-csrc - 12.72 kB - 05/18/2018 at 00:43

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3nitiAS1_test3.asm

Test 3 - 3niti alpha simulator with 1 paragraph of code and 1 paragraph of data (no use for external memory yet)

asm - 21.67 kB - 05/18/2018 at 00:43

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  • 1 × PIC16F870 Microprocessors, Microcontrollers, DSPs / ARM, RISC-Based Microcontrollers
  • 1 × socket DIP-28
  • 1 × tactile switch
  • 1 × 4-pin header
  • 1 × 20MHz crystal

View all 22 components

  • Speed of current version

    SHAOS06/13/2018 at 02:42 0 comments

    Current version of firmware of 3niti alpha simu1 simulates only TWO 27-triad pages - one in RAM (in PIC's data registers) and one in ROM (in PIC's EEPROM). I found my notes with approximate speed of each instruction, measured in 2011 (in microseconds):

            from RAM from ROM
    NNN (SAN)     21       28
    NNO (SAO)     21       28
    NNP (SAP)     21       28
    NON (SAF)     18       25
    NOO (SPCD)    23       30
    NOP (SAB)     18       25
    NPN (SAL)     22       29
    NPO (SAM)     22       29
    NPP (SAH)     22       29
    ONN (RLA)     23       32
    ONO (ADD)     45       52
    ONP (RRA)     23       32
    OON (LAI #)   27       41
    OOO (ADI #)   55       69
    OOP (OPA #)   44       58
    OPN (LDI ###) 48       76
    OPO (JMP ###) 55       83
    OPP (OPB ###) 93      121
    PNN (LAN)     22 29*   29 36*
    PNO (LAO)     22 29*   29 36*
    PNP (LAP)     22 29*   29 36*
    PON (LAF)     19       26
    POO (LPCD)    24       31
    POP (LAB)     19       26
    PPN (LAL)     23       30
    PPO (LAM)     23       30
    PPP (LAH)     23       30
    where * means with reading data from ROM

    So for example LAF (load A from F) takes 19us (nineteen microseconds) if executed from RAM (52,631 times per second) and 26us (twenty six microseconds) if executed from ROM (38,461 times per second). 

    When I add external I2C memory support with page caching in the PIC the speeds above (RAM column) will be true only if execution keeps running in the same page - to jump to other page firmware will need to read 27 triads from external memory and cache into RAM again...

  • 3niti alpha simu1 PCB/KIT on Tindie

    SHAOS05/21/2018 at 23:12 0 comments

    3niti alpha simu1 simulator of ternary computer on binary microcontroller (PIC16F870) is available on Tindie:

    https://www.tindie.com/products/TRC/3niti-alpha-simu1/

    You can order PCB, KIT or pre-build board

  • Quick tests

    SHAOS05/16/2018 at 14:14 0 comments

    In order to test 3niti alpha with front panel you can do steps below:

    Power ON with all switched in neutral position (O) should gives you all indicators OFF (all O) and 3niti alpha will stay in PAUSE mode. Then you move right switch (S/G) down that should start program running (Go), but because all memory should be zeroes at this point (OOO) it should perform ADI 0 instruction and address indicators (left 9 lamps) will start count up with step 2:

    (if you already have something at OOO OOO OOO and later then this test will actually launch that program)


    Now power OFF and power ON 3niti alpha again (with all switches at neutral position

    While in PAUSE mode move left switch up:

    It will set address switches to POO OOO OOO - now move switch I/M up:

    It will move chosen address to program counter (PC) and left 9 ternary lamps will indicate this change (see above) - in the same time previous value of PC (OOO OOO OOO) will be stored internally. Now move switch I/M back and PC will stay with that address:

    Here INTERRUPT was performed to force 3niti alpha to jump to specified address and to store previous value of program counter to know where to return. If you move I/M down it will jump back to "main" program by restoring PC value (OOO OOO OOO):


    Now test read/write capabilities - power OFF and ON with neutral position again:

    Set address switches to OPO OOO OOO:

    Then set data to write (NNP):

    Writing is performed by moving switch W/R up:

    As you can see data indicators started to show new value - if now you return switch back to neutral position, indicator will switch back to showing value from memory cell where program counter points:

    Here it's OOO OOO OOO and OOO. Move data switches back to OOO:

    Now you may try to read value from OPO OOO OOO by moving switch W/R down:


    NOTE: for latest firmware of 3niti alpha simu1 only 2 paragraphs (27-triad blocks) of memory are implemented:

    OOO xxx ABC - for "read-only" (stored in EEPROM of PIC16 and writable only through serial connection by PDBL console commands) and

    OPN xxx ABC - read-write memory, writable from front panel (stored in DATA registers of PIC16).

    I'll extend memory in near future (external memory should be used for that purpose - it's already there on the board - only software support is required)

  • Historical Videos

    SHAOS03/07/2017 at 04:28 0 comments

    3niti alpha simu1 tests in 2009:

    Test1 (see source code here):

    Test2 (see source code here)

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