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Finally, an update.

A project log for Software Defined Radio (SDR) In An FPGA

Building blocks for creating a software-defined radio (SDR) in an FPGA

joesugarjoesugar 09/02/2015 at 00:210 Comments

It's been a while since I've updated this project. Not that I've forgotten about it, I've just had some trouble deciding on a direction for it.

The original idea was not to produce a specific product but to create VHDL blocks for signal processing and generation. But what good are the blocks without a project showing how to use them?

So now if you go the project repository you'll find the master branch and a number of development branches. The master is a fork of the ZPUino project and contains the blocks developed to date in the contributions directory. However, they are not integrated into the core. The development branches are dedicated to the individual blocks (or groups of blocks developed together), containing a project with integrated blocks and ZPUino sketches showing how they're used.

Blocks that have been integrated so far include:

WM8731 - A block used to read and write from a WM8731 audio coded, the same codec used on the Arduino audio codec shield. It includes integration of the OpenCores I2C block and an asynchronous FIFO used to go between the ZPUino and WM8731 clock domains.

PSK - A block used to produce a PSK31 audio signal. It includes a CORDIC block with supporting files and a numerically controlled oscillator (NCO). You can find more information on this block at https://ceworkbench.wordpress.com/2014/06/01/a-pks31-beacon-in-an-fpga/

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