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Protect the programmer

A project log for J1772 Hydra

Charge two electric vehicles at once

nick-sayerNick Sayer 01/18/2019 at 18:071 Comment

The 5.0 design currently has 5v supplied from the HV board instead of 12v, and instead of deriving 5v from 12v with a buck converter, 12v is derived from 5v with a boost converter. And then after that, -12v is derived from +12 with a charge pump.

One of the things connected to the 5v rail is the ISP header for programming the controller. In the past, I've noted that when you connect up the programmer, the display lights up because the programmer provides power. My programmer is normally configured for 3.3v, so that means that effectively the whole circuit is "browned out." This hasn't been an issue before, but I'm now concerned that the booster and the rest may be just too much stuff to ask a programmer to power incidentally. Not to mention that I'm not sure what the booster is going to do with 3.3v instead of 5 (other than just draw ~40% more current).

So that means that the ISP header and controller need to be in their own power domain, with a backfeed prevention circuit bridging the two. 

The backfeed prevention circuit starts with a P channel MOSFET connected between the Vcc and PROG_VCC nets. What's a little unusual is that the source is connected to the PROG_VCC net and the drain is connected to Vcc. At first glance, this seems backwards, but the key to the operation of the circuit is the MOSFET's body diode. It must be forward-biased in the "normal" state of affairs and reverse biased during programming. For the gate, we start with a pull-open resistor from source-to-gate of 100 kΩ. That will insure that the gate is pinned high unless explicitly brought low. This is accomplished with an MMBT3904 BJT transistor. The transistor's collector goes to the gate and the emitter to ground. The base is connected to the Vcc bus with a 100kΩ resistor. A BJT is used in this case because we want to detect the ability of Vcc to actually supply current. There will always be some manner of leakage through the MOSFET, but unless it's turned on, there won't be enough current available to switch on the BJT.

It's important that if you do this, you don't wind up having the controller's GPIO pin power the rest of the circuit by accident. This can happen if another IC connected to a controller's output has a protection diode from the input to Vcc. If this is the case, you have to add series resistance (1 kΩ is good) to keep this from happening. This isn't a problem during programming - most of the non-ISP lines are inputs then - but in the period of time between finishing programming and removing the programmer, the code will run. This can also happen if you have other devices sharing an ATMega's SPI bus. Since the SPI pins are used for ISP programming, they may need protection from other devices.

For the Hydra, none of the pins need protection. Most are inputs, and those that are outputs don't have any low impedance paths to Vcc.

UPDATE:

It's worth mentioning that I've discovered that this circuit is a simpler version of a well-known design idiom known as an "ideal diode." The difference between the classic ideal diode's behavior and mine is that in my case, any voltage at all on the +5 side is enough to close the MOSFET, while an ideal diode has a comparator between the two sides and only closes when the voltage on the "anode" exceeds the voltage on the "cathode." Typically this is done using two PNP transistor B-E junctions acting like diodes with a common cathode (base). Whichever "diode" winds up forward biased will also have collector current, and that collector current is used to pull the MOSFET gate up towards the source when the "cathode" transistor is the winner.

More about the Ideal Power Diode circuit (my favorite is variant 3) is here.

Discussions

Mike Szczys wrote 01/18/2019 at 22:59 point

Very cool explanation, I wish I could give a skull to this project log. 👍

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