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74HC = functional

A project log for sdramThing4.5 "Logic Analyzer"

An AVR, 128MB SDRAM DIMM, old laptop LCD, and a handful of TTL chips -- 30+MS/s 32-channel logic-analyzer interface for an analog 'scope

eric-hertzEric Hertz 03/05/2015 at 11:380 Comments

mmmm kay...

So, my logic-reasoning seems, at least, 1/3rd correct... Switching to the 74HC series has made it functional in "one-shot-bypass" mode. Which, it shoulda done *ages* ago. I still don't understand how it could've *not* worked, previously... The 'scope showed it OK, and, if I understood correctly, the clock-rate was *much* slower than the delays... But, switching to HC's seems to have made it work as expected. Might, plausibly, also have been related to the valid Vih/Vil conditions at these unspec'd voltages... OTOH, again, I *did* 'scope it, and it *did* appear to be correct.

Fine, I know I was stretching limits... and I know I was *really* stretching 'em, in this case. I am glad it's finally functioning as it should've... what.. week*s* ago?

I shall repeat what I said in my description-update. If you're doing something *simple* with some glue-logic... then don't be afraid to *try* using 5V TTL chips at 3.6V... Yahknow, if you've already got 'em on hand. I mean, an inverter for lighting an LED, or maybe even an AND, etc. gate here-and-there might *likely* be functional... I *have* in fact, been using 5V TTL chips rated for 4.5-5.5V from the early 1980's in simple 3.6V circuits for a couple years. But, yahknow, just don't expect it to be *perfect*. And, definitely, don't design a circuit expecting to use them permanently/professionally.

So, obviously, there's a non-insignificant bit of daisy-chained logic involved in my new circuitry, so, maybe it makes sense that using 3.6V-capable devices (the 74HC series) makes some amount of sense that it's now working as expected from the start.


I haven't, yet, attempted to test the one-shot circuitry--only currently testing in one-shot-bypass mode--so, that's next.

I guess the next step is using one-shot mode with the same SDRAM/uC clock-rate. It may (should?) add a one-column offset in read/write... OTOH, it might be cancelled out because the Read/Write command and the corresponding DQM strobe would *both* be shifted by one clock-cycle.

This will be a little bit of work...

Before: Chip-Select-Enable was activated, then Chip-Select was strobed

Now: Chip-Select will be activated, then Chip-Select Enable will be strobed.

(Chip-Select is bi-directional, whereas Chip-Select Enable is always an output from the uC).

It sounds easy, but the CS_En bits feed through quite a bit more logic... so there's quite a bit of potential for delays.... (and I *just* located a 130MHz crystal oscillator on an old motherboard, with-which every tiny delay will have a huge influence.)

So, there's a bit of coding to be done. As far as I recall, there are three places where an old chip-select strobe will have to be replaced by a CS_En strobe (and CS will have to be set up ahead of time): once in a Macro, which may be used in a few places... The other two are in inline-assembly... in the Read and Write functions. (What happens in the "startFreeRunning()" function?)

I *so* want to code this up and try it *right now*, but it's already 3:30AM, and... admittedly... I can't exactly focus, at the moment. We're talking, probably, 4 hours worth of work, just to get to a point to *try* the new code... and there's some amount of thankfulness that I'm (atypically) not in the mindset to be able to pull that off, right now.

OTOH, it's somewhat hard to accept the fact that it works *now* with the 74HC's. I know that seems obvious, but I 'scoped that shizzle!

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