Yann Guidon / YGDESSPARC uses register windows to provide a bunch of fresh registers across function calls. It was touted as a very RISC thing and history has shown that it was not the best idea, overall. So yeah, forget about it, as is, because it only moves the actual problems to where KISS doesn't work.
Instead, why not just map more than one data register to memory for each address register ? (see Memory-mapped registers in the F-CPU project)
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IIRC, AT&T Hobbit processors does this. In fact, their instruction set architecture doesn't even let you specify registers; there's just no such thing. Everything is expressed as offsets to a pointer, which is either implicit in the CPU or explicit in the current stack frame. The processor's cache implementation has to be particularly and singularly clever to automate mapping of stack frame references to internal registers, making this work fast enough.
At the clock speeds Hobbit ran at, it was a relative success. However, I'm not sure how scalable it is to higher clock speeds, since AT&T abandoned Hobbit, and nobody else picked up the technology.
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I have no idea what that Hobbit CPU is, I'll have to look it up :-)
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