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Panel Design Help?

A project log for SMT to DIP Breakout Boards

Eagle files used to convert SMT chips to DIP format for use in breadboard prototyping.

kevin-neubauerKevin Neubauer 05/28/2015 at 02:313 Comments

If you have some experience with Eagle and would be willing to spend some time putting together 5cm x 5cm and 10cm x 10cm panel BRD files for DirtyPCB fabrication, I would much appreciate the help. Drop me a comment here.

Discussions

Kevin Neubauer wrote 05/28/2015 at 16:19 point

Stefan,

No worries. I'm not an expert either! Thank you for these panels.

The 100x80 is a good variety pack. I think I'm going to send it off for fab to see how it works out. I'm debating about going the variety route or making panels of each type. Maybe I should just do both to accommodate cases where someone only needs 1 type of board.  What are your thoughts?

Looking at the boards from DP. I'm not sure how they could be used on a breadboard with QFP pins on the top and bottom. Maybe I'm missing something?

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Stefan Lochbrunner wrote 05/28/2015 at 17:23 point

I was suggesting to use a QFP/TQFP footprint like those from DP on a DIP board. Contacting the bottom pad or avoiding shorts with it might be an issue but might also be easily fixed with some kapton tape.

Regarding the choice of panels, I think that a 50x50 panel with two boards for multiple packages would be the best (and cheapest to cover most cases). Since you get 10+ pieces from DirtyPCBs you might as well just use a SOIC28 for a SOIC8 chip. If you get a board with only TSSOP breakouts for example you might end up never using one kind.

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Stefan Lochbrunner wrote 05/28/2015 at 12:04 point

Hi Kevin, I gave it a shot:

https://www.dropbox.com/sh/8ta91we3t0pd6e3/AAB_BTHhjN-HtYPGC_cqJ_wFa?dl=0

I'm not an expert but I used the same technique as I did for #Pro Trinket USB Keyboard where I had the PCBs made by DirtyPCBs, too, and it worked out great. I used EAGLE 6.6.0 for compatibility and ran their DRC without errors. Since I only have the freeware the max size is limited to 100mm by 80mm which is enough for all boards to fit but it's not completely optimized. For the 50mm one I chose the largest QFN/TQFP and SOIC/TSSOP packages that would fit since you could also use a SOIC20 board for a SOIC8 chip if you needed. For the QFP breakouts on a 5cm*5cm board it would be better to use a foot print like this: http://dangerousprototypes.com/docs/Dangerous_Proto_boards

Let me know what you think.

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