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A project log for Tern - Ternary Logic Circuits

A series of ternary logic gates and higher level components implemented in the real world.

mechanical-advantageMechanical Advantage 05/23/2016 at 06:420 Comments

I had the opportunity to get some face time with an engineer with 30+ years of experience doing analog and digital layout design. That means he takes schematics and turns them into the patterns of metal and silicon that make up the microscopic components in an integrated circuit. Since he also happens to be my father, it worked out that we could spend some time discussing the theoretical possibilities of ternary integrated circuits. After much discussion, we determined that there is no reason why it can't be done, but there are many reasons why maybe it shouldn't be.

To summarize; ternary circuits require more transistors per gate. They also require fewer gates per component (42 trits can represent significantly more values than 64 bits). If this were the only thing that needed to be considered then ternary would be similar in complexity and space on the chip or might have a slight advantage. Ternary would also reduce the number of interconnects needed between components on the chip but it turns out that this is not really a big problem in IC design, so that benefit is minor (previously I had believed that interconnects were a big problem. Not so much it turns out). So far, ternary is the clear winner, but not by a large margin.

Now for the downside. A really big problem in IC design is the routing of power and ground. Different components need different voltages and the handling of these different voltage potentials in microscopic areas requires some finesse. All manner of analog problems rear up such as signal integrity, capacitance, etc. Going from needing two voltages (Vcc and Gnd) to needing five (in my current design style) or even three (in a theoretical design technique we dreamed up) would be a major shift in the way the power routing is done. Doing this would probably require reducing clock speed to preserve signal integrity but of course we couldn't say for certain without serious simulation.

On the other hand, I would note that clock speeds have not been increasing at the same rate we used to see and manufacturers are making up the difference with more cores. If ternary integrated circuits were to be built, then process maturity could catch up with clock speed. But thats all theoretical. I suspect that a ternary processor would benefit from multi-core architectures more than binary does so if adding cores starts to be more feasible than increasing clock speed, then ternary might be more efficient in the long run. Maybe.

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