<Sigh>. I got sidetracked again by accidentally discovering how to do everything I've already done in a totally new way. I have recreated and tested every ternary monadic gate using only discrete transistors and accompanying passives. I don't even need the +1V and -1V references for these. Now I know for a fact that there is no technical reason why ternary gates cannot be miniaturized and implemented in silicon. It would be an old non-CMOS process, but it would work. I worked up the first eight gates so here they are. I'll post the remaining gates when I get a chance to document them. Then back to rebuilding a Sum gate that doesn't shoot itself in the foot.

On a related note, I also took a second look at a project called the Trimux that I had previously disregard as being pseudo-ternary. I had misunderstood that it accepted binary inputs and had ternary outputs. Now that I look at it more carefully, I find that it really is ternary and more elegant than any of my existing techniques in many ways. It is based on pass-transistor logic (which I've already implemented slightly in my Flip-Flap-Flop and ill-fated Sum gate) and quite simple. I'm looking forward to plagiarizing shamelessly ;)