Lattice has some demo design and code, mostly all verilog, while I have nothing against verilog, I do prefer VHDL. This works as well, but it needs some more lookup into docs to get the device primitives done right. But then it works, simple and easy environment, code, and compile to bitstream.

I still have to grab out my AVR CPU core ICE port, and add the hard IP so that they are accesible from embedded firmware.