This project log explains about PCB layout and design consideration of The Low Voltage Translator. To save costs and optimize the design, we will use the PCB as well as the component circuit and box panel of The Low Voltage Translator inspired from The uCurrent Project [1]. Making IO panel on the box case is costly and time-consuming for small-scale production like in this project. The connection between separated circuit and IO panel also can add noise significantly from the environment [2]. Figure 1 is the example of using PCB as well as component circuit and box panel in The uCurrent project.

Figure 1. Top layer PCB containing the circuit (left) and bottom layer PCB as IO panel box (right)

We will replace the plastic box on Figure 1 with the metal box to reduce noise by using Faraday Cage effect for shielding against EMI [2]. We also can keep the metal shield on the panel by making a ground plane on the PCB layer dedicated as an IO panel like on the right picture in Figure 1. We also adapt uCurrent for uses of the battery without a switch-mode regulator for reducing noise. But, this project using two battery for split supply instead of op amp follower like in the uCurrent to overcome output impedance of the op-amp.

For designing a PCB, we are using Circuit Maker, Altium version for open source PCB design. So, you can put this project design in your Circuit Maker using the keyword "The Low Voltage Translator". Figure 2 and Figure 3 contains the top layer and the bottom layer of The Low Voltage Translator design.

Figure 2. Top layer PCB design

The top layer PCB design used for all of circuit network. Trace in the top layer is red. All the trace in the top layer made as short as possible to minimize impedance [2]. The long trace, the IO signal trace, and the power trace made by using the polygon to minimize trace impedance [2]. The via only connecting ground on the top layer and ground plane on the bottom layer to minimize impedance. The purpose of minimizing impedance in this design is to reduce noise pickup on the trace.

To minimize trace reflection, we are using rounding shape on the corners trace which are better than 45-degree corners [2].

Figure 3. Bottom Layer PCB design

Trace in the bottom layer is blue. Trace In the bottom layer PCB only contain ground plane for connecting ground on the top layer and for shielding uses [2]. Besides that, the ground plane also minimize loop area which have the same function as the antenna that vulnerable against EMI. View of the 3D model of the top layer and the bottom layer can be seen on the Figure 4 and Figure 5.

Figure 4. 3D model of top layer PCB design

Figure 5. 3D model of bottom layer PCB design

Reference

[1] Jones, David L., The µCurrent A professional precision current adapter for Multimeters, Silicon Chip magazine (2010).

[2] Carter, Bruce. SLOA089, Circuit Board Layout Techniques. Excerpted from Op Amps for Everyone. Texas Instruments (2008).