I have the schematic finished now.  I checked the major critical paths to the VRAM, fining one that was too slow.  The VRAM takes up to 55ns from address input to data output, and I have only 62.5ns, so really it is super close.  Since the uPD7220 uses an address latching mechanism, I managed to move my address-modifying critical path to before this latching is done.  The timing there is much more forgiving.  Other than that, I added some pretty LEDs and checked/fixed some of the logic done in the circuit.I may add more decoupling capacitors still, but that isn't a real design change.  The capacitors are the only SMD components I'm using.

In total I'm using 32 TTL ICs, two RAM chips, and the uPD7220 of course.  Loading it in the PCB editor, it looks smaller than I may have expected, but I don't think I'll feel the same when I receive the finished board - it is significantly bigger than my original uPD7220 card:I think I'll also need to make some minor adjustments to the circuit design so the routing is easier, but these are not really functional changes - things like changing the bit order on registers, or rearranging the allocation of gates from chips.