The long awaited Sum gate has arrived! After giving up on it and moving onto latches, I have finally finished a (barely) functional Sum gate. The sum gate is called such because its output is the sum of a two-trit input. Like so;

a, b, out

-, -, +

-, 0, -

-, +, 0

0, -, -

0, 0, 0

0, +, +

+, -, 0

+, 0, +

+, +, -

As you can see, anything added to a 0 results in itself and a + added to a - is a 0. Two -'s result in a + and two +'s result in a - because there would be a carry out if you were actually doing a math problem. Yay. Now I can do kindergarten math.

The reason I'm not jumping for joy is because the current design I'm using has been kept down to only four IC's through serious overuse of cascaded diode logic. I've managed to get all the outputs to stay strictly within my defined valid logic levels, but just barely, and only through a lot of trial and error with selecting pull-up and pull-down resistor values to coax the appropriate intermediate voltage levels towards the final output.

Hmmm, it only just occurred to me that I might be able to use pull-middles in there somewhere to clamp out unwanted intermediate voltages... Back to the drawing board!