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It seems to be audio
09/26/2018 at 01:46 • 0 commentsConfiguration of the FM receiver was very straight forward. Here is the script in Teraterm language, my preferred choice of terminal software.
; power up the FM receiver: CTS and GPO2 enabled, external RCLK, analog output sendln '[0x22 0x01 0xc0 0x05]'#13 pause 1 ; Get version information sendln '[0x22 0x10][0x23 r:8]'#13 pause 1 ;set FM tune frequency to 8990 = 0x231E sendln '[0x22 0x20 0x00 0x23 0x1E]'#13 pause 1 ;Use GET_INT_STATUS (command 0x14) or hardware interrupts Until STC bit is set sendln '[0x22 0x14][0x23 r:2]'#13 pause 1 ;Call FM_TUNE_STATUS With INTACK bit set (command 0x22) sendln '[0x22 0x22 0x01]'#13 pause 1
To be added: scope plot of the line out signal and description of listening to it.
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PCB ver 1.1
09/01/2018 at 03:35 • 1 comment2 little issues are on the board.
- The GPO1 signal on the Si4731 FM chip connected to the ARTY board is held low during RESET. To enable I2C configuration for the chip, it needs to be pulled high by the internal pull-up resistor (weak). A quick cut of the trace fixed this.
- The PCM3070 datasheet has unclear information about the REF signal. A schematic has it connected to 3.3V, the pin description states on a capacitor connected for noise suppression. Of course I picked the wrong one and connected it to 3.3V. This fix was a little bit tricky because it was connected to 3.3V between the pin and the cap by a via to a bottom layer trace. But drilling out the via barrel and leaving the track around it intact fixed this as well.
The uploaded schematic shows the 2 fixes already.
Happy configuring.
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Configuration through I2C
08/20/2018 at 01:16 • 0 commentsFor ease of configuration I am hooking up a Bus Pirate (or as I prefer to call him Bus Privateer, because they are the good pirates) to the I2C interface and run scripts with all config commands through my terminal program of choice (Teraterm).
Example (might be good to put this into the instructions section):
Initial commands:
Bus Pirate configuration and run macro (1) to scan all device:
HiZ>m 1. HiZ 2. 1-WIRE 3. UART 4. I2C 5. SPI 6. 2WIRE 7. 3WIRE 8. LCD 9. DIO x. exit(without change) (1)>4 Set speed: 1. ~5KHz 2. ~50KHz 3. ~100KHz 4. ~400KHz (1)>4 Ready I2C>(1) Searching I2C address space. Found devices at: 0x22(0x11 W) 0x23(0x11 R) 0x30(0x18 W) 0x31(0x18 R)
7bit address 0x11 is the Si4731 FM receiver, 0x18 is the audio processor TI PCM3070. Nice.
Si 4731: Power up and request revision information:
I2C>[0x22 1 0xc0 5] I2C START BIT WRITE: 0x22 ACK WRITE: 0x01 ACK WRITE: 0xC0 ACK WRITE: 0x05 ACK I2C STOP BIT I2C>[0x23 r] I2C START BIT WRITE: 0x23 ACK READ: 0x80 NACK I2C STOP BIT I2C>[0x22 0x10][0x23 r:8] I2C START BIT WRITE: 0x22 ACK WRITE: 0x10 ACK I2C STOP BIT I2C START BIT WRITE: 0x23 ACK READ: 0x80 ACK 0x1F ACK 0x36 ACK 0x30 ACK 0x00 ACK 0x00 ACK 0x37 ACK 0x30 NACK I2C STOP BIT
PCM3070: Write 0x42 into the page select register and read back for testing as this one does not have an ID or revision register
I2C>[0x30 0x00 0x42] I2C START BIT WRITE: 0x30 ACK WRITE: 0x00 ACK WRITE: 0x42 ACK I2C STOP BIT I2C>[0x30 0x00][0x31 r] I2C START BIT WRITE: 0x30 ACK WRITE: 0x00 ACK I2C STOP BIT I2C START BIT WRITE: 0x31 ACK READ: 0x42 NACK I2C STOP BIT
That was easy. Now I have to read all the programming and configuration guide.
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PCB something PCB
08/10/2018 at 11:56 • 0 commentsPCBs are ordered, so are the parts. Boards will be purple and this log will be the collector for assembly and bringing up the hardware. Looking forward soldering the QFN32 0.5mm pitch IC.
Update 13. Aug: Parts are here from Digikey. Boards are in manufacturing.
Update 14. Aug: PCBs are shipped from OSH Park. This is getting exciting (happens every time when FR4 is on the way).
Update 17. Aug: PCBs came in yesterday, beautiful as always. Thanks @oshpark .
Now the fun part starts with hand soldering QFN32 0.5mm pitch. :))
This was a piece of cake and this is how it looks like:
Also, I have established I2C communication to the PCM3070 audio processor and the Si4731 FM receiver through the trusted bus pirate.Next log: bug fix report.
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New base platform
07/23/2018 at 00:30 • 0 commentsI just scored a DIGILENT ARTY S7 FPGA board, which is the perfect platform for the RRB project. It has a Spartan7 XC7S50 FPGA and best of all, 256MB DDR3 SDRAM on board already. So I don't have to run a SDRAM interface over PMOD connectors, which was risky from the beginning. And it has Arduino compatible (3.3V) headers. Now I can design a shield with all my crazy audio hardware. All block diagrams will be updated in the near future. Good times.
This is the new system concept.
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More components
04/20/2018 at 13:28 • 0 commentsJust found out that the NXP UDA1380 is end of life:-(. Looks like I am back to component hunting again. Looking for a Audio line in to I2S and I2S to line out codec.
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Memory size and let's do the time warp again...
04/17/2018 at 01:26 • 0 commentsAssuming CD quality, I have 44100 samples/sec in 16 bit. For stereo this is 176400 Bytes/sec or 10584000 Bytes/minute. The smallest SDRAM with availability and second source is 64Mbit x 8 = 67108864 Bytes. So I will have about 6 Minutes and 20 seconds (in NA units this is 6 1/3 minutes ;-) time warp rewind time. This should be more than enough to listen to the missed news and not many songs are longer than 6 minutes, unless your really like November Rain or Pink Floyd and have a radio station that plays the songs to the very end and not only half </rant>.
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Components
04/06/2018 at 00:53 • 0 commentsHeart of the prototype will be a Numato Elbert V2 FPGA board. It has a Xilinx Spartan3 XC3S50A FPGA, which is somewhat unfortunate for me as a lifelong Altera guy but they all speak VHDL.
It should be large enough to handle a SDRAM core and 3 I2S interfaces. The board has 39 dedicated IOs and I am sure the 6 LEDs and 8 DIP switches can be re-purposed if necessary. The buttons might come in handy for a user interface, except the big red button of course, which will be there no matter what. 32 IOs are located on 4 PMOD connectors. the daughter card will connect through them and will mainly hold the SDRAM interface (~30GPIOs for a 64M x 8bit device). 64Mx8 is the smallest I could find with an 8bit data bus to save pins and available quantities. Also on the daughter card will be the FM radio and the line in and out interfaces. Separate control interfaces will go to an Arduino controller, could be as simple as an I2C interface. The prototype might connect to a PC for user IO, but the end goal is a small display showing the radio station and other useful data. The big red button was part of a Sparkfun dumpster dive shipment, waiting patiently for its opportunity to shine.